ECC, parity & memory reliability
Extra check information detects or corrects particular error patterns.
Error correction is a defined capability, not a promise that every failure can be repaired.
The payload.
Build a decision
| A | B | XOR |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
NAND can build any Boolean function. Combining small gates creates selectors, adders, and control.
What this model includes
Ideal Boolean logic. Electrical timing and noise are omitted.
What happens inside
Add redundancy
Parity detects some changed-bit patterns but cannot generally locate an error. An error-correcting code stores additional information to detect and correct specified patterns. A common SECDED design corrects one bit and detects two within a codeword, while other schemes provide different coverage.
Define the protected path
DRAM on-die ECC protects internal storage structures. System ECC covers a larger memory path when the controller, modules, board, and firmware support it. Scrubbing periodically checks memory, and telemetry reports corrected and uncorrectable errors. Row disturbance and device failures may exceed a chosen code’s coverage.
What this means for your code
Low-level engineer
Verify end-to-end platform support and error reporting. Define behavior for an uncorrectable error, not only corrected counts.
Software developer
For long-running critical work, consider reliability alongside speed. Backups, checksums, and application recovery cover different failure modes from ECC.
Read the actual specifications
These references supply the underlying contracts and implementation details. The diagrams here are simplified teaching models.