ISA, microarchitecture & ABI
The instruction contract, its implementation, and the rules for calling code.
Two CPUs can run the same binary while doing very different work inside.
What software may observe.
Follow an instruction
Overlap improves throughput. Dependencies introduce bubbles unless the implementation can forward or do independent work.
What this model includes
Five-stage, single-issue teaching model. Dependent mode inserts two idle issue cycles per instruction; real forwarding and hazards vary.
What happens inside
Separate the contracts
An instruction set architecture specifies visible behavior: registers, instruction meanings, addressing, exceptions, and privilege. A microarchitecture implements that contract with pipelines, caches, and execution units. The ABI specifies calling conventions, register preservation, stack layout, and binary interfaces. These are three different layers.
Follow an instruction
A compiler may lower source code into several instructions. One instruction may decode into several internal operations. Superscalar cores can issue multiple independent operations per cycle. Neither RISC nor CISC is a universal prediction of efficiency: implementation, software, and workload determine the result.
What this means for your code
Low-level engineer
Read the ISA for correctness and the optimization manual for speed. Check extension availability before issuing optional vector or crypto instructions.
Software developer
A native dependency needs the right architecture and ABI. “Arm” alone does not specify the exact supported instruction extensions.
Read the actual specifications
These references supply the underlying contracts and implementation details. The diagrams here are simplified teaching models.