silicon atlasTHE HARDWARE REFERENCE
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Reference/Inside the CPU
CPU & cores

Cores, threads & SMT

Software work, physical engines, and hardware contexts are different counts.

Sixteen logical processors do not always mean sixteen complete execution engines.
Software thread

A schedulable execution state.

LIVE EXPERIMENT

Add more cores

Runs on your device
One core
1×
8 cores
4.71×
Serial work staysParallel work shrinks
Ideal speedup4.71×
Limit with infinite cores10×
Efficiency58.82%

The serial fraction limits total speedup. Extra cores cannot accelerate the part that must run sequentially.

What this model includes

Fixed total work, perfect parallel scaling, no scheduling or communication overhead. This is an optimistic bound.

FOLLOW THE MECHANISM

What happens inside

1

Schedule software work

A software thread has execution state managed by the OS or runtime. The OS schedules runnable threads onto logical CPUs. A context switch changes the active state and can disrupt cache and predictor locality. A sleeping thread consumes no continuous execution slot.

2

Share one physical core

Simultaneous multithreading keeps multiple hardware contexts on one core. They share substantial execution, cache, and bandwidth resources. SMT can use otherwise idle slots when one context stalls, but two busy contexts can compete. Core count, logical CPU count, and software thread count must be reported separately.

PUT IT TO WORK

What this means for your code

Low-level engineer

Inspect topology and pin only when measurements justify it. Shared execution resources and NUMA placement can dominate thread scaling.

Software developer

Size pools for the work. I/O concurrency can exceed core count; CPU-bound worker count should be measured against physical topology and contention.

GO TO THE SOURCE

Read the actual specifications

These references supply the underlying contracts and implementation details. The diagrams here are simplified teaching models.

Arm · big.LITTLEArm
Intel · Optimization reference manualsIntel

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