silicon atlasTHE HARDWARE REFERENCE
العربية
Reference/The whole system
Systems & I/O

Firmware, boot & the operating system

Bring the hardware up, describe it, and hand control to a kernel.

Before your first application starts, software has already configured much of the machine.
Firmware

Initial platform setup.

LIVE EXPERIMENT

Follow an instruction

Runs on your device
12345678910
I1
F
D
E
M
W
I2
F
D
E
M
W
I3
F
D
E
M
W
I4
F
D
E
M
W
I5
F
D
E
M
W
I6
F
D
E
M
W
F · FetchD · DecodeE · ExecuteM · MemoryW · Writeback
Instructions6
Total cycles10
Visible cycle1

Overlap improves throughput. Dependencies introduce bubbles unless the implementation can forward or do independent work.

What this model includes

Five-stage, single-issue teaching model. Dependent mode inserts two idle issue cycles per instruction; real forwarding and hazards vary.

FOLLOW THE MECHANISM

What happens inside

1

Start from reset

The processor begins at an architecture-defined reset entry. Platform firmware establishes enough clocks, memory, and device configuration to continue booting. UEFI defines interfaces used by loaders; embedded systems may use very different firmware paths. Hardware descriptions such as ACPI tables or device trees tell an OS what exists.

2

Hand control to the kernel

A loader prepares the kernel and initial state. On a UEFI path, exiting boot services transfers responsibility while defined runtime services can remain. The kernel configures memory management, interrupts, scheduling, and drivers. Processes execute with permissions and use system calls to request privileged services.

PUT IT TO WORK

What this means for your code

Low-level engineer

Learn reset state, memory maps, privilege transitions, and firmware handoff. Never assume RAM or interrupts are ready before initialization.

Software developer

A system call crosses an abstraction boundary, not necessarily a process switch. Driver and firmware versions can affect performance and correctness.

GO TO THE SOURCE

Read the actual specifications

These references supply the underlying contracts and implementation details. The diagrams here are simplified teaching models.

TianoCore · UEFI driver architectureTianoCore
RISC-V · ISA specificationsRISC-V International

Keep following the connection

Understood the idea? Keep a note of your progress.